A topology of interleaved Three-Level(TL) converter is proposed under the premise of no increasing input current ripple, in order to lessen the input current distortion at the zero-crossing of Boost Power Factor Correction(PFC) under high frequency condition, and to reduce the inductance volume and switches’ voltage & current stress as well, and then to increase PFC converter power rate. The topology integrates interleaved technology with TL technology, and compensates the disadvantage of interleaved technology that it can lessen the input current distortion but fails to promote other performance of the converter. This paper analyses the principle and working condition of the converter. Simulation results demonstrate the validity of this topology.