A low power，configurable and floating-point Fast Fourier Transform(FFT) processor based on Field Programmable Gate Array(FPGA) is introduced. It can operate at 4,16,64 and 256 points. Radix-4 algorithm based on frequency extraction and single butterfly structures based on memory are utilized. Butterfly operation unit is optimized by reducing the number of multipliers，and the power consumption is reduced. The memory adopts the ping-pong storage structure, which improves the data throughput rate. The use of floating-point operations improves the computing accuracy of the processor. The design of processor is synthesized by using Semiconductor Manufacturing International Corporation(SMIC)0.18 μm process library，and its power consumption is 0.62 mW/MHz. It is implemented on the ACX1329–CSG324 FPGA.