A multi-channel dynamic First Input First Output(FIFO) caching design method based on Field Programmable Gate Array(FPGA) is proposed in order to achieve a balanced and efficient transmission of the channel data in the process of multi-channel data transmission. The method, which is realized on FPGA platform, manages to dynamically maintain the data transmission status of each channel by establishing a small storage unit, and dynamically allocate the cache space for each channel data quickly by using the database indexing technology. Experimental results show that the method can achieve balanced transmission of each channel, save the storage resources and improve the efficiency of data transmission for each channel with fewer caching settings.