Design of a general test system for integrated circuit Single Event Effect
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    Abstract:

    In order to meet the requirements of Single Event Effect(SEE) evolution for a wide variety of integrated circuits with complex functions and overcome the limitations such as time constraints and limited physical space in current domestic ground single event irradiation experimental environment, an efficient and universal single event effect test system is designed and implemented for integrated circuits, which innovatively adopts rotating solid vertical structure,including a multi-Field Programmable Gate Array(FPGA) electrical test platform,a motion control subsystem and some loading boards of the Devices Under Test(DUT). The entire test system is packaged as a portable box, which only needs three DB9 interfaces to complete all connections with the outside world. Therein the PC interface is achieved based on LabVIEW, friendly to users. The lower computer test program is implemented based on the multi-FPGA platform, which is flexible, extensible and versatile. It can realize one-time installation, automatic switching and angle radiation test of 8 types of integrated circuits within 300 PINs, meanwhile monitor in real-time and background record the detail information such as flip data, flip time, circuit status and so on, whose test frequency achieves 100 MHz. The reliability, efficiency, stability, high integration, and convenient installation and debugging have been verified by multiple tests on Application Specific Integrated Circuit(ASIC), Static Random-Access Memory(SRAM), Controller Area Network(CAN) interface circuit and other integrated circuits.

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杨婉婉,刘海南,高见头,罗家俊,滕 瑞,韩郑生.集成电路的通用单粒子效应测试系统设计[J]. Journal of Terahertz Science and Electronic Information Technology ,2021,19(2):347~351

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History
  • Received:October 17,2019
  • Revised:December 24,2019
  • Adopted:
  • Online: May 07,2021
  • Published: