Power consumption of 1.2 kV SiC MOSFET with integrated Low-Barrier Diode
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1.School of Integrated Circuit, Southeast University,Nanjing Jiangsu 210096,China;2.National ASIC System Engineering Research Center, Southeast University,Nanjing Jiangsu 210096,China

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    Abstract:

    To address the issue of high freewheeling losses caused by SiC Metal-Oxide-Semiconductor Field-Effect Transistors(MOSFETs) during the freewheeling process in power modules, an integrated Low-Barrier Diode SiC MOSFET(LBD-MOS) structure is proposed. The total power consumption of LBD-MOS and the conventional SiC MOSFET(CON-MOS) under the same area is investigated. Simulation results show that the freewheeling voltage drop(UF) of LBD-MOS is 1.6 V, which is 50% lower than that of CON-MOS; the switching loss (E_switch) of LBD-MOS is 187.3 μJ, which is 6% lower than that of CON-MOS. Under operating conditions with a frequency of 10 kHz and a duty cycle of 50%, the total power consumption of LBD-MOS is reduced by 22.6% compared to that of CON-MOS. LBD-MOS is suitable for applications where the freewheeling ratio is higher than 50% and the switching frequency does not exceed 1 MHz.

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孙佳萌,付浩,魏家行,刘斯扬,孙伟锋.集成低势垒二极管的1.2 kV SiC MOSFET器件功耗[J]. Journal of Terahertz Science and Electronic Information Technology ,2025,23(4):309~316

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History
  • Received:May 24,2024
  • Revised:June 24,2024
  • Adopted:
  • Online: May 07,2025
  • Published: