Investigation on the test circuit of the dynamic on-state resistance of GaN HEMTs
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National ASIC System Engineering Research Center,Southeast University,Nanjing Jiangsu 210096,China

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    Abstract:

    The heteroepitaxial process of Gallium Nitride High Electron Mobility Transistors (GaN HEMTs) leads to the presence of a trapping effect in GaN HEMT devices. This effect causes dynamic changes in the on-resistance of the devices under continuous transient operating conditions, known as dynamic on-resistance, which is higher than the theoretical value under static conditions. This dynamic on-resistance can pose a threat to the stability of power systems. Therefore, it is necessary to investigate efficient and accurate testing methods for the dynamic on-resistance of GaN HEMT devices. The mechanism of dynamic on-resistance generation in GaN HEMT devices is introduced in this paper. In combination with practical testing requirements, a novel clamping circuit based on an ultra-high-speed voltage feedback operational amplifier is designed. The Pspice simulation tool is employed to simulate this new clamping circuit and compare it with other commonly used existing clamping circuits. The results show that this circuit can more rapidly and accurately read the drain voltage of the device after it transitions from the off-state to the on-state. It also enables the characterization of the device's on-resistance under different bias voltages and frequencies.

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刘梦丽,李胜,马岩锋,刘斯扬,孙伟锋. GaN HEMT器件动态导通电阻的测试电路[J]. Journal of Terahertz Science and Electronic Information Technology ,2025,23(4):317~321

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History
  • Received:May 08,2024
  • Revised:August 29,2024
  • Adopted:
  • Online: May 07,2025
  • Published: